To meet the stringent low-power requirements of the GSM/TD-SCDMA market, CYIT implemented advanced low-power techniques including multiple power domains with shutdown, and used IEEE-1801 Unified Power Format (UPF) to specify the power intent. Following this accelerated tapeout, CYIT has deployed the Synopsys solution for the implementation of all future low-power ICs.

"The Synopsys low-power design flow allowed us to put our first UPF-based low-power design into production much faster than we anticipated," said professor Zheng Jianhong, vice president of Technology at CYIT. "This robust and reliable solution allows us to design new chips more rapidly and predictably."

To address the design's multiple multi-voltage blocks, CYIT utilized a hierarchical low-power flow with power intent definition described in UPF. Synopsys Professional Services assisted in designing the production chip using the Synopsys Lynx Design System. This approach allowed the CYIT engineering team to implement and deploy this flow with ease, resulting in the speedy completion of a production-ready design within five months.

"Companies in the mobile market such as CYIT have very tight performance, power and schedule requirements," said Bijan Kiani, vice president of product marketing for design and manufacturing products at Synopsys. "By providing a comprehensive and automated low-power solution, the Galaxy Implementation Platform accelerates design schedules and enables our customers to bring competitive products to market faster."